Job Description

Analog Layout Engineer – Lower Node Job Description Position: Analog Layout Engineer Experience: 3-6 Years Location: Bangalore Notice Period: Immediate- 30 Days Key Responsibilities Design and develop analog/mixed-signal layouts for advanced technology nodes. Work on lower-node technologies such as 28nm, 16nm, 7nm, 5nm and below. Perform custom layout, floorplanning, placement and routing of analog/mixed-signal blocks. Handle matching, common-centroid, symmetry, shielding, guard rings and sensitive analog layout techniques . Perform DRC, LVS, ERC and PEX and resolve layout-related issues. Collaborate closely with Circuit Design, Physical Design, Verification and Technology teams . Optimize layouts for area, performance, parasitics and reliability . Support tape-out activities and ensure quality/layout sign-off.



Required Skills Strong experience in Analog/Mixed-Signal Layout . Hands-on experience with lower-node technologies . Good understanding of MOS, resistor, capacitor, current mirror, differential pair and analog IP layouts . Experience with Cadence Virtuoso / Custom Compiler or equivalent tools. Solid knowledge of DRC, LVS, ERC and PEX . Understanding of advanced matching and layout techniques . Exposure to FinFET / advanced-node layout is an added advantage. Preferred Experience in SerDes, PLL, ADC/DAC, PMIC, Memory or high-speed analog blocks . Experience working on 7nm/5nm/3nm or other advanced process nodes . Good communication and cross-functional collaboration skills.

📌 Analog layout Engineer- Bangalore (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru