01 Sep
|
Weekday AI (YC W21)
|
Hyderabad
01 Sep
Weekday AI (YC W21)
Hyderabad
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Experience: 4+ yrs
Location: Hyderabad, Telangana, India, Bengaluru
Job Type: Full-time
We are looking for an experienced FPGA/RTL Engineer to contribute to the design, development, simulation, implementation, and debugging of FPGA-based systems. The role involves working with legacy RTL, clocking and register modules, radar waveform generation, and high-speed digital signal processing blocks.
The ideal candidate will have strong hands-on experience in RTL design, FPGA implementation, simulation, debugging, and radar waveform agility , with the ability to work effectively on complex hardware systems and troubleshoot issues across the development lifecycle.
Requirements Key Responsibilities
- Develop, modify, and maintain RTL designs for FPGA-based systems
- Analyse and enhance existing or legacy RTL modules while maintaining functional compatibility
- Design and integrate DCM/clocking architectures and related clock-management logic
- Develop and maintain register modules and associated control logic
- Design and implement radar waveform agility functionality covering Frequency, PRI, PW, and Phase
- Work with LFM and NLFM waveform generation requirements
- Design and integrate RSG wrappers and DDS I/Q functionality
- Develop and validate digital logic through RTL simulation and functional verification
- Perform FPGA synthesis, implementation, timing analysis, and programming activities
- Debug hardware and FPGA issues using JTAG and ChipScope or equivalent debugging tools
- Analyse simulation and hardware results to identify root causes of functional or timing issues
- Fix RTL and FPGA implementation bugs and validate corrective changes
- Collaborate with hardware, firmware, verification, and systems teams to resolve technical issues
- Support integration, testing, troubleshooting, and system-level validation activities
- Maintain technical documentation related to RTL designs, implementation, debugging, and changes
- Follow established FPGA development, coding, verification, and quality standards
What Makes You a Outstanding Fit
- 4+ years of hands-on experience in FPGA and RTL development
- Strong proficiency in Verilog/VHDL or equivalent RTL design languages
- Experience working with legacy RTL and modifying complex digital logic designs
- Strong understanding of FPGA architecture, clocking, timing, synthesis, and implementation
- Hands-on experience with DCM/clocking modules and register-based control logic
- Practical experience with radar waveform generation and waveform agility is highly desirable
- Knowledge of Frequency, PRI, PW, Phase, LFM, and NLFM waveform concepts
- Experience with DDS and I/Q signal generation
- Strong understanding of RTL simulation, debugging, synthesis, and FPGA implementation workflows
- Hands-on experience with JTAG, ChipScope, or similar FPGA debugging tools
- Strong analytical and troubleshooting skills with the ability to diagnose complex hardware and RTL issues
- Ability to work effectively across design, verification, firmware, and hardware teams
- Strong attention to detail, ownership, and commitment to delivering robust and reliable FPGA designs
📌 FPGA / RTL Engineer (Hyderabad)
🏢 Weekday AI (YC W21)
📍 Hyderabad