01 Sep
|
Astera Labs
|
Bengaluru
01 Sep
Astera Labs
Bengaluru
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of up-to-date AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
We are seeking talented Design Verification Professionals with proven expertise in industry-standard protocols such as PCIe and CXL. You will play a key role in the functional verification of designs, from developing block-level and system-level verification plans to writing test sequences, executing tests,
and collecting and closing coverage.
Responsibilities:
- Develop and execute block-level and system-level verification plans.
- Write and execute test sequences and collect and close coverage.
- Collaborate with RTL designers to debug failures and refine verification processes.
- Utilize coding and protocol expertise to contribute to functional verification.
- Develop user-controlled random constraints in transaction-based verification methodologies.
- Write assertions, cover properties, and analyze coverage data.
- Create VIP abstraction layers for sequences to simplify and scale verification deployments.
Basic Qualifications:
- Minimum of 12 years’ experience in supporting or developing complex SoC/silicon products for server, storage, and/or networking applications.
- Strong academic and technical background in Electrical Engineering or Computer Engineering (bachelor’s degree required, master’
📌 Principal Design Verification Engineer (Bengaluru)
🏢 Astera Labs
📍 Bengaluru