Hi,
Opening for FPGA Design with HAPS.
JD:-
FPGA design engineer with 9+yrs of exp in the following
1. Xilinx FPGA - Versal and Ultrascale families
2. Handling large SOC design and familiarly with VCS, Xcelium tools
3. Proficient in Verilog/ System Verilog and Test benches.
4. Experience in HAPS emulation - HAPS100 or HAPS200 ,protocompiler flow.
5. Hands on experience in bring up of PCIe, SPI, I2C, DDR interfaces and robust experience in debug.
Please share your resume to
[email protected]
Regards,
Jaya
📌 Opening for FPGA Design engineer with HAPS experience (Dharwad)
🏢 UST
📍 Dharwad