Job DescriptionSenior Staff DFT Engineer NLocation: Bengaluru NExperience: 12–16 Years NRole Overview NWe are looking for a Senior Staff DFT Engineer with deep hands-on expertise in DFT architecture, implementation, ATPG and silicon bring-up for complex SoC designs. NKey Responsibilities Nn Own DFT architecture and methodology for complex SoC/full-chip designs. N Drive Scan insertion, ATPG, MBIST, JTAG and test compression implementation. N Develop and validate DFT specifications, test modes and coverage targets. N Drive ATPG pattern generation, coverage analysis and fault debug. N Analyze and resolve DFT timing, test power, coverage and physical implementation issues. N Collaborate with RTL, Physical Design, STA, Verification and Silicon teams through tapeout and bring-up. N Develop DFT flows and automation using Tcl/Python/Perl.



NnCore Technical Skills Nn Strong expertise in Scan, ATPG, MBIST, JTAG, EDT/Test Compression. N Hands-on experience with Synopsys DFTMAX/TestMAX, TetraMAX or Siemens Tessent. N Deep understanding of stuck-at, transition, path-delay and memory fault models. N Solid knowledge of DFT architecture, testability, coverage and test modes. N Experience with advanced-node SoCs and full-chip DFT signoff. N Strong scripting, debugging and cross-functional technical leadership. NnIdeal Candidate: A deeply hands-on DFT technical leader capable of owning SoC DFT from architecture through implementation, signoff and silicon bring-up.

📌 Senior Staff Dft Engineer (Vasanthanagar)
🏢 Leadsoc Technologies
📍 Vasanthanagar