Job Description
Senior Staff DFT Engineer
n Location: Bengaluru
n Experience: 12–16 Years
n Role Overview
nWe are looking for a Senior Staff DFT Engineer with deep hands-on expertise in DFT architecture, implementation, ATPG and silicon bring-up for complex SoC designs.
n Key Responsibilities
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- Own DFT architecture and methodology for complex SoC/full-chip designs .n
- Drive Scan insertion, ATPG, MBIST, JTAG and test compression implementation.n
- Develop and validate DFT specifications, test modes and coverage targets .n
- Drive ATPG pattern generation, coverage analysis and fault debug .n
- Analyze and resolve DFT timing, test power, coverage and physical implementation issues.n
- Collaborate with RTL, Physical Design, STA, Verification and Silicon teams through tapeout and bring-up .n
- Develop DFT flows and automation using Tcl/Python/Perl .n
n Core Technical Skills
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- Robust expertise in Scan, ATPG, MBIST, JTAG, EDT/Test Compression .n
- Hands-on experience with Synopsys DFTMAX/TestMAX, TetraMAX or Siemens Tessent .n
- Deep understanding of stuck-at, transition, path-delay and memory fault models .n
- Strong knowledge of DFT architecture, testability, coverage and test modes .n
- Experience with advanced-node SoCs and full-chip DFT signoff .n
- Strong scripting, debugging and cross-functional technical leadership.n
n Ideal Candidate: A deeply hands-on DFT technical leader capable of owning SoC DFT from architecture through implementation, signoff and silicon bring-up .