Standard Cell Layout Design Engineer
Location : Bangalore, Karnataka, India
Job Type : Full time
About GLOBALFOUNDRIES
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Role Overview
Join our Foundry IP Development team in Bangalore to design and optimize high-quality Standard Cell IPs for advanced process nodes. Collaborate with global engineering teams to deliver cutting-edge layouts that meet the highest industry standards.
Key Responsibilities :
Develop and optimize layouts for Standard Cell IPs, including combinational and sequential cells
Conduct layout verification (LVS, DRC, DFM, EMIR) and review
Support layout teams with design kit preparation, validation, and layout automation
Design Power Management Kit cells (e.g., Level Shifters, Isolation, Power Gating)




Create custom cells to meet low-power and high-speed design requirements
Participate in test chip integration, silicon bring-up, and characterization
Document specifications and contribute to productivity improvements and innovation

Required Qualifications :
Bachelor's degree with 10+ years or Master's degree with 8+ years in Semiconductors/Microelectronics/VLSI Engineering
Hands-on experience in Standard Cell layout design, including:
Combinational and Sequential Cells
Power Management Kit cells (Level Shifter, Isolation, Always-on Cells)
Ultra High-Density and High-Performance Libraries
Proficiency in EDA tools (Synopsys, Mentor, Cadence) for layout design, parasitic extraction, DRC, LVS, DFM, EMIR
Basic understanding of semiconductor fabrication steps
Experience in test chip integration

Preferred Qualifications :
Robust knowledge of CMOS technology and state-of-the-art st

📌 Standard Cell Layout Design Engineer Bengaluru (India)
🏢 Globalfoundries Engineering Private
📍 India