to support and enhance DFT flows across IP and SoC programs. The role involves developing scalable automation solutions, improving productivity, and enabling seamless integration of DFT methodologies. Key Responsibilities: Develop and maintain
report generation, data parsing, and quality checks
for DFT deliverables. Work with DFT and implementation teams to
streamline and optimize existing flows . Support
simulation, LEC, and GLS runs
through automation. Build reusable utilities for
debug, regression management, and environment setup . Enable
continuous integration (CI) based DFT execution flows
(positive to have). Collaborate with cross-functional teams for flow deployment and issue resolution.
Required Technical Skills: Strong scripting expertise in
Python / Perl / Tcl / Shell
(at least one or more). Good understanding of
DFT fundamentals : Scan architecture ATPG Scan compression MBIST / LBIST (basic exposure) Hands-on experience with industry tools such as: Synopsys DFT Compiler / TetraMAX / TestMAX Cadence Modus
(good to have) Experience in
log parsing, report automation, and flow orchestration . Familiarity with
Linux/Unix environment and revision control systems (Git/SVN) . Basic knowledge of
Verilog/SystemVerilog . Nice to Have: Exposure to
IJTAG / IEEE 1687 / 1500 Experience with
Makefile, regression frameworks, or CI/CD pipelines Understanding of
SoC level DFT integration flows Debug support for
GLS / pattern simulation failures Soft Skills: Strong analytical and problem-solving skills. Good communication and ability to work in a fast-paced environment. Quick learner with a p
📌 Senior DFT Engineer (Mumbai)
🏢 ACL Digital
📍 Mumbai
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