Company Description Plus PPA Nanochip Technologies Pvt. Ltd. is a semiconductor technology company focused on advanced design solutions for high-performance integrated circuits. The organization specializes in power, performance, and area (PPA) optimization, providing cutting-edge design services and IP for global clients. With a strong emphasis on innovation and quality, Plus PPA Nanochip Technologies supports complex design flows and best-in-class methodologies. Team members collaborate closely on challenging projects in a fast-paced environment, with opportunities to learn, grow, and contribute to next-generation semiconductor products.Role Description The SRAM Compiler Layout role is a full-time, on-site position based in Bengaluru. The selected candidate will work on physical layout design for SRAM compilers, ensuring optimal PPA, reliability, and manufacturability. Day-to-day responsibilities include creating and optimizing layout structures, performing design rule checks (DRC) and layout versus schematic (LVS) verification, and collaborating with circuit design and verification teams to refine memory architectures. The role also involves documenting layout methodologies, reviewing design constraints, and supporting layout sign-off across process technologies.



The candidate will participate in design reviews, coordinate with cross-functional teams, and help improve internal tools and workflows for memory layout design.Qualifications Candidates should possess strong skills in Layout Design and Page Layout for semiconductor memory and compiler structures.Candidates should possess skills in Graphic Design and Graphics for effective visualization, documentation, and presentation of layout concepts.Candidates should possess familiarity with Digital Marketing to support basic technical content or branding efforts related to design capabilities, if required.Experience with industry-standard EDA tools for custom layout (e.G., Cadence Virtuoso or similar) and knowledge of DRC/LVS flows is beneficial.A solid understanding of CMOS fundamentals, memory architectures (SRAM), and semiconductor process technologies is beneficial.Solid analytical, problem-solving, and collaboration skills, with the ability to work accurately under schedule constraints, are beneficial.Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI, or a related technical field is beneficial with Year of Experience : 4 to 10

📌 Sram Compiler Layout (Bengaluru)
🏢 Plus PPA Nanochip Technologies
📍 Bengaluru