(India) System IP Design Engineer (Bengaluru)

(India) System IP Design Engineer (Bengaluru)

02 Sep
|
Tenstorrent
|
Bengaluru

02 Sep

Tenstorrent

Bengaluru

Tenstorrent is leading the industry on cutting-edge AI technology,
revolutionizing performance expectations, ease of use, and cost efficiency. With
AI redefining the computing paradigm, solutions must evolve to unify innovations
in software models, compilers, platforms, networking, and semiconductors. Our
diverse team of technologists have developed a high performance RISC-V CPU from
scratch, and share a passion for AI and a deep desire to build the best AI
platform possible. We value collaboration, curiosity, and a commitment to
solving hard problems. We are growing our team and looking for contributors of
all seniorities.

We’re looking for a hands-on RTL Design Engineer to own the microarchitecture
and RTL implementation of the Power Management Subsystem/Interrupt
Controllers/AXI Interconnect/Cache Controller. You’ll collaborate with
cross-functional teams—architecture, firmware, software, DV, and PD—to define,
design, and optimize power management solutions for next-generation
RISC-V/ARM-based SoCs.

This role is hybrid, based out of Bangalore, India.





We welcome candidates at various experience levels. During the interview
process, you will beevaluated and offered a level that aligns with your
experience, which may differ from the one in this posting.

Who You Are

* 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in
microarchitecture and RTL development
* Skilled in Verilog/SystemVerilog and comfortable working across design,
debug, and analysis
* Design and develop microarchitectures for a set of highly configurable IPs
* Microarchitecture and RTL coding ensuring optimal performance, power, area
* Work with verification teams on assertions, test plans, debug, coverage, etc.
* Deep understanding of power management concepts—clocking, reset, DVFS, and
low-power modes
* Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB,
APB, CHI)
* Awareness of functional safety (ISO 26262) practices in hardware design

What We

📌 (India) System IP Design Engineer (Bengaluru)
🏢 Tenstorrent
📍 Bengaluru

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