Semiconductors / VLSI / ASIC Design Job Summary: We are looking for a skilled and motivated
PD EMIR Engineer
to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting performance, power, and area (PPA) optimization and signoff closure. Key Responsibilities: Experience in ASIC EMIR/PD flow and EDA tools experience such as Redhawk-SC , Redhawk – IR and EM Analysis tool Analyze EMIR violations and provide implementation choices to Physical design Scripting language experience: Python, perl, shell preferred. Robust verbal and written communication skills Knowledge of the PnR tools is added advantage
Interested can share CV to
📌 Pd Emir Engineer Bengaluru (India)
🏢 ACL Digital
📍 India
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