- Design and deploy ML inference models for engineering use cases: prediction, classification, anomaly detection, and recommendation over design/simulation data
- Build data engineering pipelines to ingest, clean, label, and version datasets from design and layout databases, as well as simulation and physical verification results
- Develop LLM-based applications with chain-of-thought prompting for guided troubleshooting, documentation Q&A;, and methodology assistance
- Implement MLOps practices: model versioning, A/B testing, monitoring for drift, and reproducible training pipelines
- Create APIs and services that integrate ML capabilities into existing EDA and engineering platforms
- Collaborate with domain experts to define features, labels, and evaluation metrics grounded in engineering outcomes
- Stay current with industry-standard techniques in deep learning, transformers, and efficient inference
Preferred candidate profile
- B.S. or higher in Electrical Engineering, Computer Engineering, or Computer Science
- 3+ years of professional digital design verification experience
- Strong experience building SystemVerilog/UVM testbenches (architecture, agents, scoreboards, coverage) - not only writing tests in an existing environment
- Strong experience with scripting languages (Python, Bash)
- Strong debugging and analytical skills
- Excellent communications skills with the ability to work and thrive in a team workplace