Job Description

About Company

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At 7Rays Semiconductors ( , we provide end-to-end VLSI design solutions to help our clients achieve execution excellence. Our team of experts specializes in architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologies

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We work closely with our clients, building effective partnerships to deliver high-quality solutions tailored to their needs. With a proven track record of successful projects, we are committed to excellence and innovation in semiconductor design.

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Job: STA/Synthesis Engineer

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Location- Bangalore and Noida

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6+ years experience in STA/Synthesis
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Hand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis.
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Synthesis Quality with FE Inputs, LEC setting, UPF Cleanup, Generic Partition level UPF ? and VCLP Signoff.
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USER mode SDC (will have generic dft constraints), Generic DFT SDC, GCA,



Flat Timing convergence, Timing Signoff, Merging Modes
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Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis.
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Knowledge on the Timing closure on Sub system level & Block level and Chip level.
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Knowledge on Writing Manual ECO’s to fix timing violations and DRC’s.
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Knowledge on constraint development.
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Positive Knowledge of TCL scripting and UNIX env.
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Leading the team 4 to 5 team members by guiding and mentoring on the STA /Synthesis.
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Prelayout timing analysis and report out Post layout timing analysis for placement, CTS & PRO Clock gating checks and timing closure ECOs and final tapaout timing closure skills across corners and modes.
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Must have worked with RTL design team, PD team and HMs team for overall timing closure for SoC.
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📌 Sta Static Timing Analysis And Synthesis Engineer Bengaluru
🏢 7rays Semiconductors
📍 Bengaluru