Job Description
STA Engineer
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nKEY RESPONSIBILITIES:
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Responsible for Multi Voltage domain STA setting setup, execution and timing closure of GPUn
Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checksn
Ensuring timing correlation between PnR STA and timely feedbacks to PD teamn
Generating block level HS session and using Top context from SoC for Block-SoC Interface timing closure.n
Generating timing ECO using Tweaker/PrimeClosure.n

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nPREFERRED EXPERIENCE:
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3+ years of experience in timing closure of high frequency blocks like CPU/GPU (> GHz range)n




Analyzing the timing reports and identifying both design and constraints related issues.n
Worked on blocks with multiple power and voltage domainsn
Preferred EDA tool experience: Primetime, Tweaker/PrimeClosure, Innovusn
Robust Understanding of DFT modes requirements for timing signoffn
Good understanding of physical design flow and ECO implementationn
Strong understanding of SDC constraints, OCV,AOCV,POCV analysisn
Solid TCL/scripting knowledge is mandatory.n

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nACADEMIC CREDENTIALS:
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Bachelors or Masters degree in Electrical Engineeringn

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📌 Sta Engineer Bengaluru (India)
🏢 MediaTek
📍 India