Job Description
Hiring : Senior SRAM / Memory Compiler Design & Layout Engineers

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NextiCron Technologies is expanding its SRAM and memory compiler development team. We are looking for experienced semiconductor professionals with strong expertise in memory circuit design, compiler development, and a good understanding of custom memory layout.

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Locations : Flexible

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Employment Type : Full-time

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Work Mode : Flexible, based on project requirements

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Responsibilities

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- Design and develop SRAM, ROM, and register file memory compilers.
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- Work on memory architecture, read and write paths, sensing circuits, assist techniques, control logic, and design margins.
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- Perform functional, timing, power, yield, and PVT analysis.
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- Support memory characterization and the generation of Liberty and Verilog models.
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- Contribute to memory compiler architecture, validation, and automation flows.
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- Collaborate with custom layout engineers on bitcells, peripheral circuits, array integration, parasitic effects, and physical implementation.




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- Review layout-dependent effects and support DRC, LVS, EM/IR, LEF, and GDS deliverables.
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- Provide technical guidance and support the execution of memory compiler development projects.
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Required Qualifications

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- 3–15 years of hands-on experience in SRAM, embedded memory, register file, ROM, or memory compiler development.
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- The position may be offered at the Senior, Staff, Principal, or Lead level, depending on the candidate’s experience and technical expertise.
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- Strong understanding of memory architecture, transistor-level circuit operation, design margins, and PVT variation.
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- Experience with memory characterization and deliverables such as Liberty and Verilog models.
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- Positive understanding of SRAM bitcell and peripheral layout, array integration, parasitic effects, DRC, and LVS.
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- Hands-on experience with Cadence, Synopsys, Siemens EDA/Calibre, or equiv

📌 SRAM Senior (Bengaluru)
🏢 NextICron Technologies
📍 Bengaluru