Post Silicon Validation/Test(ATE/Bench) Engineer

Salary: 4000 SGD ~ 7000 SGD

Positions: 5

- Test program development for Digital, PMIC, RF & Mixed Signal products on Bench and (or) ATE (primarily on Advantest 93k - SmarTest 7, SmarTest 8 / Teradyne UFLEX)
- Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities
- Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature)
- Understanding and experience in characterization of RF, PMIC or Mixed Signal IP (ADC, DAC, PLL and etc.)
- Involve on test program hand off, production release, yield improvement and test time reduction
- High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering,



and Foundry Engineering teams.

Job Requirements

- Graduates from Degree in Electronics / Electrical Engineering
- Minimum 2-7 yrs relevant experience on the Test Engineering is preferred
- Hands on experience on Teradyne Ultra Flex or Advantest 93K ATE’s is added advantage.2
- Usage of bench instrumentation for characterization of ICs
- Good Knowledge of analog and digital electronics is desired.
- Strong analytical and problem solving ability with desire to perform hands-on work within a lab workplace is a must.
- Very strong verbal and written communication skills and able to work independently
- Only Singaporeans/ SPR preferred.

📌 Test Engineer (Bengaluru)
🏢 TESSOLVE
📍 Bengaluru