IP Verification Engineer

Location: Bengaluru

Experience: 5–10 Years

Role Overview

We are looking for an experienced IP Verification Engineer to drive verification of ARM CPU subsystems and coherent interconnect architectures, with solid expertise in CHI coherency protocols and ARM subsystem debug/bring-up.

Key Responsibilities

- Develop and execute verification strategies for ARM CPU Subsystem (CPUSS) IPs.
- Verify AMBA CHI coherency and interconnect protocols, including functional and corner-case scenarios.
- Develop SystemVerilog/UVM testbenches, sequences, assertions, and functional coverage.
- Validate cache coherency, ordering, snoop transactions, data consistency, and error scenarios.
- Debug complex CPU subsystem, interconnect, and coherency failures across simulation and emulation.
- Support ARM subsystem bring-up, integration, and post-silicon debug.
- Drive regression, coverage closure, failure triage, and root-cause analysis.
- Collaborate with RTL, Architecture, Firmware, Emulation,



and Silicon teams.

Core Technical Expertise ARM CPUSS Verification | AMBA CHI | Coherency & Interconnect | SystemVerilog | UVM | Cache Coherency | Assertions | Functional Coverage | Subsystem Debug & Bring-up

Required Qualifications

- 5–10 years of hands-on IP/Sub-System verification experience.
- Strong experience with ARM CPU subsystem verification.
- Deep understanding of AMBA CHI and coherency concepts.
- Strong SystemVerilog/UVM verification skills.
- Experience debugging complex CPU/interconnect/coherency issues.
- Exposure to ARM subsystem integration, bring-up, emulation or silicon debug.

Preferred

- Experience with ARMv8/v9-based systems.
- Knowledge of ACE/AXI, cache hierarchy, snoop mechanisms, and memory ordering.
- Experience with simulation/emulation platforms and protocol checkers.

📌 IP Verification Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru