Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead Design Verification Engineer to join our PCIe Express IP Products team in Bengaluru, India. The successful candidate will participate in pre-silicon RTL Verification activities related to PCIe Controller SoftIP development, on leading-edge PCI-Express and CXL controller technologies. This is a Full Time position, reporting to the local onsite Verification management.
Responsibilities
Testbench and test sequence development for verification of current controller technologies and features
Functional coverage planning, coverage item coding, and test suite augmentation to achieve Functional Coverage
Regression test development, monitoring, debug/triage, and correction to test workplace, sequences, debug of controller RTL design
Development & support of Verification setting scripting and capabilities
Qualifications
Bachelors Degree or above in EE/CS, at least 7+ years experience with HDL logic Design-Verification
System Verilog / UVM testbench, Verilog/System Verilog logic design/RTL fluency a must
Pre-existing Experience / familiarity with PCI-Express controller and protocol required
Working experience with Python and TCL scripting languages preferred
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.