Job Description
Hiring : Senior SRAM / Memory Compiler Design & Layout Engineers
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nNextiCron Technologies is expanding its SRAM and memory compiler development team. We are looking for experienced semiconductor professionals with robust expertise in memory circuit design, compiler development, and a good understanding of custom memory layout.
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n Locations : Flexible
n Employment Type : Full-time
n Work Mode : Flexible, based on project requirements
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n Responsibilities
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- Design and develop SRAM, ROM, and register file memory compilers.n
- Work on memory architecture, read and write paths, sensing circuits, assist techniques, control logic, and design margins.n
- Perform functional, timing, power, yield, and PVT analysis.n
- Support memory characterization and the generation of Liberty and Verilog models.n
- Contribute to memory compiler architecture, validation, and automation flows.n
- Collaborate with custom layout engineers on bitcells, peripheral circuits, array integration, parasitic effects, and physical implementation.n




- Review layout-dependent effects and support DRC, LVS, EM/IR, LEF, and GDS deliverables.n
- Provide technical guidance and support the execution of memory compiler development projects.n

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n Required Qualifications
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- 3–15 years of hands-on experience in SRAM, embedded memory, register file, ROM, or memory compiler development.n
- The position may be offered at the Senior, Staff, Principal, or Lead level, depending on the candidate’s experience and technical expertise.n
- Strong understanding of memory architecture, transistor-level circuit operation, design margins, and PVT variation.n
- Experience with memory characterization and deliverables such as Liberty and Verilog models.n
- Good understanding of SRAM bitcell and peripheral layout, array integration, parasitic effects, DRC, and LVS.n
- Hands-on experience with Cadence, Synopsys, Siemens EDA/Calibre, or equivalent semiconductor design tool

📌 SRAM Senior (Bengaluru)
🏢 NextICron Technologies
📍 Bengaluru