Associate II (Hyderabad)

Associate II (Hyderabad)

06 Sep
|
UST
|
Hyderabad

06 Sep

UST

Hyderabad

Role Description

Job Title: Engineering - Hardware Design Engineer 2 Job Description: JOB DUTIES: Must solid experience with memory technologies, and a desire to develop broader exposure to their downstream use in a dynamic, cutting edge VLSI Synthesis setting. This role will provide key support for multiple projects in a globally distributed team. Responsibilities will include: Read and understand documentation of and answer end-user question regarding Synopsys memory compilers Generate compiled memory views and perform quality assurance on those views for each released version. Perform program management, tracking action items and progress against due dates. EXPERIENCE AND EDUCATION: Understanding of SRAMs and memory compilers (Synopsis Memory Compiler experience preferred) as well as VLSI design flow;Familiarity with memory design and views of memories, e.g. Verilog,



timing (.lib), LEF, GDS;Familiarity with physical design verification, e.g. DRC and LVS;Able to perform and interpret circuit simulations, e.g. using SPICE;Ability to execute and modify scripts in PERL, Unix shell, Tcl, Python or related language. 2-4 years of experience Release Comments: Skills:4 to 6 year's experiencePhysical Design floor planning including power grid designunderstanding of timing concepts and signoffGood hands-on experience in analyzing and fixing physical DRCs and analyzing LVS issues in Calibre tool

Skills

Design Verification, Hardware Design, Physical Design, Program Management, Python, Testing, VLSI

📌 Associate II (Hyderabad)
🏢 UST
📍 Hyderabad

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