Analog Layout Engineer
Exp- 4 to 10 Yrs
Location- Hyderabad
JD
TSMC 16/12nm,7nm,5nm,3nm and below Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Verification flows - LVS/DRC/DFM/Antenna check/EMIR experience. Responsible for on-time delivery of block-level layouts of acceptable quality. Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. BE or MTech in Electronics/VLSI Engineering Good communications skills as we work with cross-functional teams. Share the profiles who have valuable hands-on experience in recent times on lowers nodes. Interested candidates can share resume to neha.c@
📌 Analog layout engineer (Hyderabad)
🏢 ThunderSoft India Private
📍 Hyderabad
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