Job Description
? We're Hiring | Memory Layout Engineers ?
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nWe're looking for experienced Memory Layout Engineers to join our team and work on cutting-edge semiconductor technologies.
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nExperience: 4+ Years
nLocation: Bangalore
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nKey Responsibilities:
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- Design memory layouts for various building blocks, including:n
- Bit Cell Arrays ,Row Decoders, Column Decoders, Sense Amplifiers, Input/Output (I/O) Blocksn
- Integrate top-level memory layouts.n
- Perform physical verification using DRC and LVS.n
- Ensure layouts comply with Design for Manufacturability (DFM) and Design for Yield (DFY) requirements.n
- Analyze layouts for power integrity and signal integrity.n
- Develop and maintain automation scripts using PERL, Shell, TCL, or SKILL.n

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nRequired Skills:
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n✅ Solid hands-on experience in Memory Layout for advanced technology nodes.
n✅ Expertise in TSMC and/or other process technologies with lower nodes (2nm/3nm/5nm).
n✅ Solid understanding of physical verification, layout methodologies, and semiconductor design flows.
n✅ Scripting knowledge is an added advantage.

📌 Memory Layout Engineer (Bengaluru)
🏢 smartsoc solutions
📍 Bengaluru