Responsibilities:
- Work on
DFT features
: scan, ATPG, MBIST, IO BIST, test access
- Verify DFT in
IP/SoC designs
- Support
ATPG closure & DFT signoff
- Collaborate with cross-functional teams
Experience Level:
- Can range from
entry to experienced
- Work involves solving
basic to complex DFT problems
with varying independence