Job Description Skill: DFT - DFT (Design for Test) is a specialized domain in the semiconductor/VLSI industry that ensures integrated circuits (ASICs/SoCs) are testable during manufacturing. DFT engineers design and implement test structures such as Scan, ATPG, MBIST, LBIST, and JTAG to improve chip quality, fault coverage, and manufacturing yield.
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n Key skills to target:
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- End-to-end DFT implementationn
- Scan insertion & compression, ATPGn
- MBIST, LBIST, JTAG/Boundary Scann
- DFT signoff, fault coverage, debuggingn
- RTL, SoC design flow, STAn
- Tools: Siemens Tessent, Synopsys TestMAX, Cadence Modusn
- Scripting: TCL, Python, Perln

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nA DFT Staff Engineer is responsible for designing, implementing, and signing off Design-for-Test (DFT)architecture for complexSoCs/IPs. The roleensures that semiconductor designs are testable, high-quality, and manufacturable, whilebalancing coverage, performance, power, and cost.
nKey Responsibilities
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- DFT Architecture G Strategy n

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- Define and implement DFT architecture at block/IP or SoC leveln
- Specify test methodologies (scan,MBIST, boundary scan,compression)n
- Ensure testability built early into RTL design flown
- Balance trade-offs between coverage, area, power, and test timen

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- DFT Implementation Perform:n

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- Scan insertion and stitchingn
- ATPG pattern generation and simulationn
- MBIST / LBIST / boundary scan integrationn
- Develop and validate DFT timing constraints (STA)n
- Execute DFT flows at RTL and gate leveln

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- Test Coverage G Ǫualityn

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- Analyze and improve fault coveragen
- Debug scan/ATPG issues and resolve coverageholesn
- Optimize:n
- Pattern countn
- Test costn
- Test timen

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- Verification G Signoffn

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- Run DFT verification and DRC checksn
- Ensure clean DFT signoff (coverage, timing, power impact)n
- Validate patterns using simulation and test

📌 DFT Engineer in Hyderabad/Bangalore (Bengaluru)
🏢 Makonis
📍 Bengaluru