Position: ASIC Design Verification Engineer – PCIE High Speed

Location: Bangalore (On-site)
Experience: 8 to 12 Years
Open Positions: 10
Job Type: Full-time
Notice Period: Immediate to 30 Days preferred

Key Responsibilities:

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Verify IPs, subsystems, and SoCs for high-performance computing systems.

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Perform block-level and system-level verification using SystemVerilog and UVM.

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Develop test plans, write and execute test cases, and debug failures.

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Work closely with design and architecture teams to ensure robust verification coverage.

Required Skills:

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Strong hands-on experience in SystemVerilog and UVM methodology.

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Experience in verifying PCI Express (PCIE) or other high-speed protocols.

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Proficiency in object-oriented programming and scripting languages like Python or Perl.

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Positive understanding of low-level programming concepts and verification flows.

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Familiarity with PC system architecture including:

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PCI Express

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USB

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Ethernet

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HyperTransport

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DDR

📌 ASIC Design Verification Engineer – PCIE High Speed (Bengaluru)
🏢 Tuitions Tree
📍 Bengaluru