DFT Lead Engineer (Vasanthanagar)

DFT Lead Engineer (Vasanthanagar)

08 Sep
|
BITSILICA
|
Vasanthanagar

08 Sep

BITSILICA

Vasanthanagar

Job Description
- 8 to 10+ yrs of experience in DFT architecture, scan Insertion, compression at core level and SoC level.
- Experience in ATPG pattern generation, coverage analysis
- Experience with timing and no-timing simulations
- Experience in Memory-BIST
- Have understanding of SSN architecture, clock architecture, OCC

📌 DFT Lead Engineer (Vasanthanagar)
🏢 BITSILICA
📍 Vasanthanagar

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