Job Title: Physical Verification Engineer

Experience: 4–15 Years

Education: Bachelor's/Master's Degree in Electronics, VLSI, Microelectronics, Electrical Engineering, or related field

Job Summary

We are looking for a skilled Physical Verification Engineer with hands-on experience in Siemens EDA (Mentor Graphics) Calibre IC Validator to support advanced semiconductor design verification activities. The candidate will be responsible for executing physical verification flows, ensuring foundry compliance, and working closely with layout, circuit design, and methodology teams to achieve tape-out quality designs.

Required Skills

- Strong experience with IC Validator (Synopsys) physical verification tool.
- Expertise in:
- DRC
- LVS
- ERC
- Antenna Checks
- Density Checks




- Metal Fill Verification
- Understanding of semiconductor fabrication processes and design rules.
- Knowledge of CMOS technology and advanced semiconductor nodes.
- Experience with custom and/or digital layout verification.
- Familiarity with physical design and tape-out flows.
- Strong debugging and root-cause analysis skills.

Technical Skills

- Tools:
- Synopsys IC Validator
- Calibre (good to have)
- Virtuoso
- ICC2 / Fusion Compiler (good to have)
- StarRC (positive to have)
- Scripting:
- Tcl
- Perl
- Python
- Shell Scripting

📌 Hiring Physical Verification Engineer for PAN India Location (Bengaluru)
🏢 Tata Consultancy Services
📍 Bengaluru