Design Verification Engineer (Bengaluru)

Design Verification Engineer (Bengaluru)

09 Sep
|
TESSOLVE
|
Bengaluru

09 Sep

TESSOLVE

Bengaluru

Job Title: Senior Design Verification Engineer – IP/SoC/Processor/GLS
Experience: 5 to 30Years
Location: [Insert Location – e.g., Bangalore / Hyderabad / Chennai / Noida ]
Company: Tessolve Semiconductor
Job Type: Full-Time | Permanent
Domain: Semiconductor – Design Verification
Job Summary:
Tessolve is hiring experienced Design Verification Engineers with a solid background in IP and SoC-level verification, along with specialization in one or more of the following areas: processor/microarchitecture verification, high-speed interfaces (e.g., PCIe, USB, DDR), or GLS (Gate-Level Simulation). This role involves ownership of verification strategy, planning, and execution in pre-silicon environments using industry-leading tools and methodologies.
Key Responsibilities:
Develop and execute detailed verification plans for IP blocks, subsystems, or SoCs.
Design and build SystemVerilog/UVM-based testbenches, scoreboards, monitors, and drivers.
Write and maintain directed and constrained-random test cases.
Perform GLS (Gate-Level Simulation) with SDF back-annotation, reset validation,



scan chain checking, and X-propagation analysis.
Verify processor cores or custom pipelines, including cache/memory subsystems, MMUs, and coherency.
Validate high-speed protocols (e.g., PCIe Gen4/Gen5, USB 3.x, DDR3/4/5, LPDDR, CXL).
Debug RTL and testbench issues using waveforms, logs, and assertions.
Collaborate with RTL, DFT, STA, firmware, and post-silicon teams to drive quality and coverage closure.
Analyze functional/code/line/branch/coverage metrics and drive closure.
Automate regressions and result analysis using scripting languages (Python, Perl, Shell, Tcl).
Contribute to methodology improvements, tool evaluation, and reusable IP verification components.
Required Skills & Qualifications:
B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering.
5–15 years of experience in ASIC/IP/SoC/Processor Design Verification.
Expertise in SystemVerilog, UVM, and constrained-r

📌 Design Verification Engineer (Bengaluru)
🏢 TESSOLVE
📍 Bengaluru

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: design verification engineer (bengaluru) / bengaluru

Subscribe to this job alert:

Get the latest job offers by email for: design verification engineer (bengaluru) / bengaluru