09 Sep
|
ACL Digital
|
Faridabad
09 Sep
ACL Digital
Faridabad
Job Description N Experience: 3 to 8 years N Location: Hyderabad/Noida NnRole and Responsibilities: Nn Responsible for Memory Compiler layout development and verification.· N Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.· N Perform layout verification like LVS/ DRC/ Latchup, quality check and documentation.· Responsible for on-time delivery of block-level layouts with acceptable quality.· Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project workplace.· N Guide junior team-members in their execution of Sub block-level layouts & review their work.· N Contribute to effectiveproject-management.· N Effectively communicatewith engineering teams in the India & Korea teams to assure the success of the layout project. NnQualification/ Requirements: Nn Should be well familiar with various levels of memory layouts from custom memory bits, leaf cells, control blocks, Read-Write, Sense Amplifiers, decoders.· N Should have expertise in floor planning, power planning,
block area estimation of memory designs or compliers.· N Should be able to perform leaf cell layout development and physical verification.· N Should have adequate knowledge of schematics, interface with circuit designer and CAD and process development team.· N Good understanding of layout fundamentals i.E. Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.· N Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,· Excellent in problem-solving skills in solving area, power, performance and physical verification of custom layout.· N Experience with Cadencetools including Virtuoso schematic editor Virtuoso layout L, XL & Verification tools like Mentor Calibre- Proficient in Device Matching, Parasitic Analysis, Electron Migration, and Isolation Techniques.· N Should have leadership qualities and able to do multi-tasking as required.· N Should be able to work in a team environment and able to guide and provide technical support to the fellow team members.· N Self-motivated, hardworking, goal-oriented and excellent verbal and written communication skills. N Knowledge of Skill coding and layout automation is a plus. N
📌 Memory Layout Engineer (Faridabad)
🏢 ACL Digital
📍 Faridabad