Designation-AI Chiplet Virtual Platform Architect / Technical Lead
Experience Level: 10–15+ Years
Role Type: Technical Lead / Architect
Location: Bangalore / Hyderabad (Hybrid)
Position Summary
Lead the architecture and development of a reusable AI Chiplet Virtual Platform / VDK for the company’s connectivity, memory, power, and chiplet infrastructure products and their integration with customer XPUs. This is the anchor architecture role for the team, and the person in this role sets the platform foundation that JD 2–7 build on.
Key Responsibilities
Customer XPU / Chiplet Architecture Analysis: Study customer XPU/SoC architecture, identify software-visible and performance-critical components, define virtualization requirements and model abstraction levels, and identify interfaces between the customer compute die and the company’s chiplets.
Virtual Platform / VDK Foundation: Architect and establish the Synopsys Virtualizer/VDK workplace; develop reusable SystemC/TLM- based platform infrastructure; define platform configuration, component hierarchy,



and interconnect architecture; establish reusable VP templates for different customer XPU configurations.
Multi-Chiplet / Multi-XPU Scalability: Define scalable virtual architectures representing multiple chiplets/XPUs, and support scale-up and multi-device configurations.
AI Infrastructure System Modelling: Define the complete system-level virtual platform architecture and integrate compute, connectivity, memory, power, and I/O models.
System Performance & Architecture Exploration: Work with performance architects to enable architecture trade-off studies.
RTL / VP / Emulation Correlation: Define the methodology for correlating TLM models with RTL and emulation.
Automated Regression & Performance Infrastructure: Define the overall VP validation and regression strategy.

Required Technical Skills
10–15+ years of semiconductor/system engineering experience.
Strong C++ and SystemC/TLM.
Synopsys Virtualizer / VDK experience.

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