Chiplet Connectivity (Pune)

Chiplet Connectivity (Pune)

09 Sep
|
Iravan Technologies
|
Pune

09 Sep

Iravan Technologies

Pune

Designation: Chiplet Connectivity & SystemC/TLM Engineer
Experience Level: 5–10+ Years
Role Type: Individual Contributor
Location: Bangalore / Hyderabad (Hybrid)
Position Summary
Develop functional and performance models for the company’s chiplet connectivity and high-speed data-movement infrastructure, including UCIe, PCIe, CXL, and die-to-die interfaces.
Key Responsibilities
Connectivity Virtual Modelling: Develop SystemC/TLM models of connectivity components; model transactions, data movement, latency, and bandwidth; develop configurable models for different link configurations; represent software-visible behavior where required.
AI Scale-Up / Fabric Modelling: Model communication between multiple XPUs/chiplets, develop scalable interconnect/fabric models, and analyze bandwidth, latency, congestion, and utilization to support scale-up architecture exploration.
Multi-Chiplet / Multi-XPU Scalability: Integrate connectivity models into multi-chiplet configurations and evaluate communication scalability as the number of XPUs/chiplets increases.
Required Technical Skills




5–10+ years of relevant SystemC/TLM or connectivity-modelling experience.
Solid C++ / SystemC / TLM.
UCIe, PCIe, and CXL.
Chiplet architecture and high-speed interconnects.
Transaction-level modelling and performance modelling.
Preferred Skills
AXI / ACE / CHI.
Ethernet, UALink, ESUN, SerDes.
AI/HPC architecture.
Synopsys Virtualizer.
Education
B.E. / B.Tech / M.E. / M.Tech in Electronics, Electrical, Computer Engineering, or related discipline.
Project Experience
Hands-on development of SystemC/TLM connectivity or interconnect models (UCIe/PCIe/CXL or die-to-die) used for bandwidth/latency analysis.
Soft Skills
Strong modelling discipline and attention to protocol-level detail.
Ability to work closely with the platform architect and performance architect to integrate models cleanly.
Good to Have
Experience modelling scale-up fabrics for multi-XPU AI systems.
Familiarity with SerDes/UALink for next-g

📌 Chiplet Connectivity (Pune)
🏢 Iravan Technologies
📍 Pune

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