Job DescriptionFormal Verification Engineer
NExperience: 4 to 12 Years
NLocation: Bangalore
NJob Description
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- Responsible for developing and executing formal verification strategies for IP and SoC blocks. N
- Write and prove assertions using SystemVerilog Assertions (SVA) or PSL. N
- Use tools like JasperGold, VC Formal, or OneSpin to verify complex designs. N
- Collaborate with designand DV teams to integrate formal early in the cycle. N
- Identify corner-case bugs that are hard to detect via simulation. N
- Perform connectivity, X-check, and equivalence checking using formal apps. N
- Debug failures and analyze root causes efficiently. N
- Drive closure with coverage and waiver management. N
- Automate formal flows using scripting (Python, Perl, or Tcl).
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- Document verification plans, results, and sign-off reports. N
nAbout Company
nACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.