Senior memory layout engineer (Bengaluru Urban)

Senior memory layout engineer (Bengaluru Urban)

09 Sep
|
smartsoc solutions
|
Bengaluru Urban

09 Sep

smartsoc solutions

Bengaluru Urban

Minimum 4+ years of experience with a Bachelor's degree in Engineering studies or Master's degree, strong layout knowledge. Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules). Solid layout knowledge in advanced submicron Fin FET processes, including TSMC 5nm, 3nm, 2nm, A14 or Samsung lower Fin FET nodes.

📌 Senior memory layout engineer (Bengaluru Urban)
🏢 smartsoc solutions
📍 Bengaluru Urban

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