IP/SoC Design EngineerFT RM 4363) (Pune)

IP/SoC Design EngineerFT RM 4363) (Pune)

09 Sep
|
Source right
|
Pune

09 Sep

Source right

Pune

Position: IP/SoC Design Engineer (BB810FT RM 4363) Key Skills

- RTL Design (Verilog)
- Microarchitecture & IP/SoC Design
- ARM-based SoC Integration
- LINT / CDC / RDC Sign-off
- Verdi, Synopsys VCS, SpyGlass
- Bus Protocols & Interconnects
- FPGA Prototyping & Silicon Bring-up

📌 IP/SoC Design EngineerFT RM 4363) (Pune)
🏢 Source right
📍 Pune

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