Experience - 2-5 years
Work Location: Bangalore (Onsite)
Notice Period : Immediate /15 days
We’re hiring engineers with robust expertise in DFT, Scan, SSN & ATPG to work on advanced chip test structures and verification flows.
Qualifications
• Degree: Bachelor's or Master's in Electrical or Computer Engineering.
Required Skills
• Scan expertise: Deep knowledge of Scan and SSN structures.
• JTAG protocols: Solid understanding of TAP controller standards.
• SoC/ASIC design: Experience with large, complex chip architectures.
• Automation coding: High proficiency in Python, Tcl, or C++.