Overview:

The STA (Static Timing Analysis) Engineer plays a crucial role in ensuring the timing closure of digital designs, making certain that the design meets functional and timing requirements.

Role: STA EngineerExperience: 5+ YearsLocation: Bangalore Required Skills:

· Should have hands-on experience with Static timing analysis and timing constraints generation as per designer input.· Experience with Tempus tools is preferred.· Working knowledge of TCL/Python is an add-on.

Required Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
Solid understanding of digital design concepts
Proficiency in Verilog and SystemVerilog
Experience with ASIC verification and timing closure
Knowledge of Static Timing Analysis (STA) tools and methodologies
Familiarity with scripting in Perl, Tcl, or Python
Ability to work effectively in a team setting
Excellent problem-solving and analytical skills
Valuable understanding of timing exceptions and constraints
Experience with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics
Strong communication and documentation skills

📌 Sta Engineer Bengaluru
🏢 Tuitions Tree
📍 Bengaluru