Application specific integrated circuit design engineer (West Bengal)

Application specific integrated circuit design engineer (West Bengal)

10 Sep
|
Macrohire
|
West Bengal

10 Sep

Macrohire

West Bengal

ASIC Frontend Design Engineer-
Work Location- Kolkata (3 days WFO)
Exp- 1) Engineer (6-12 years & IC role),
2) Manager (14-20 years)
Mode of Interview- 2 Rounds Virtual followed by last F2 F at Bangalore or Kolkata office.
JD
-Opportunity Snapsho
t We are looking for a highly skilled ASIC Frontend Design Engineer to join our high-performance VLSI team. You will be responsible for designing and delivering next-generation, high-speed ASICs for complex networking and compute systems, while collaborating with global Architecture, Design, Verification, and Physical Design teams. We foster a culture of innovation, ownership, collaboration, and continuous learning, offering excellent opportunities for technical growth and leadership
.
Key Responsibiliti
es Design and develop high-performance ASICs and So C blocks for next-generation product s. Define microarchitecture, perform RTL design, and optimize for performance, power, and area (PPA ). Develop high-quality RTL using Verilog/System Verilo g. Collaborate with Verification teams on test planning, functional coverage, debug,



and verification closur e. Work with Physical Design teams on timing constraints, timing analysis, and timing closur e. Participate in design reviews, root-cause analysis, and silicon bring-up activitie s. Drive cross-functional collaboration with Architecture, Verification, Firmware, Physical Design, and Program Management team s. Required Skil
ls Robust RTL coding expertise in Verilog/System Verilo g. Good understanding of So C architecture, microarchitecture, digital logic, and ASIC desig n. Hands-on experience with System Verilog, UVM, SVA, coverage-driven verification, and RTL concept s. Knowledge of high-speed protocols such as PCIe, Ethernet, AXI, No C, DDR/HBM, CXL, UCIe, or cache coherency protocol s. Experience with high-performance memory subsystems, clock-domain crossing (CDC), and high-speed serial interface s. Familiarity with Synopsys Design Compiler, Formality/LEC, Spy Glass, and othe

📌 Application specific integrated circuit design engineer (West Bengal)
🏢 Macrohire
📍 West Bengal

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