Job Title : Senior Emulation Validation Engineer

Role Overview

We are seeking an experienced Emulation Engineer to drive pre-silicon validation and customer co-emulation activities for next-generation SoC platforms. The candidate will work closely with architecture, design, validation, and customer teams to enable large-scale emulation environments and accelerate feature validation.

Experience

- 5+ years in Design Verification, Emulation Validation at SoC level

Key Responsibilities

- Bring up, and debug emulation environments for complex SoCs.
- Execute and validate use cases involving:
- Coherency (CoH)
- MIO and IOMMU coherent paths
- Security features such as Trusted P2P and Secure ATS
- Core validation and platform-level functionality
- Enable customer co-emulation and support critical debug activities.
- Drive test planning, execution, coverage closure,



and root-cause analysis.
- Collaborate with RTL, firmware, architecture, and model-build teams.
- Develop automation and debug tools to improve validation efficiency.
- Analyze failures and work with design teams to drive fixes.

Required Skills
- Strong understanding of SoC architecture
- Experience with hardware emulation platforms (ZeBu, Palladium, Veloce, or equivalent).
- Proficiency in SystemVerilog/UVM-based verification methodologies.
- Experience with PCIe, CXL, cache coherency, IOMMU, memory subsystems, or security protocols.
- Scripting expertise in Python, Perl, or Shell.
- Robust debugging and problem-solving skills.

📌 Emulation Engineer (Bengaluru)
🏢 HCLTech
📍 Bengaluru