10 Sep
|
CoreIC Technologies
|
Bengaluru
10 Sep
CoreIC Technologies
Bengaluru
Company Description CoreIC Technologies is a specialized engineering partner serving global clients across Semiconductor, Embedded Systems, and Digital Engineering. The company combines deep domain expertise in advanced chip design, product engineering, and cloud-native platforms to help organizations accelerate innovation and improve product delivery. CoreIC Technologies supports teams when resources are stretched, helping remove delivery bottlenecks and keep critical programs on track.
With capabilities spanning ASIC and SoC development, data and AI engineering, cloud and DevOps, and quality and security, the company offers end-to-end support for complex technology initiatives.
Role Description This is a full-time, in office Analog Layout Engineer role based in Bengaluru South.
The Analog Layout
Engineer will be responsible for creating, optimizing, and reviewing analog and mixed-signal layout designs for integrated circuits, following foundry-specific design rules and best practices. Day-to-day activities include close collaboration with circuit design engineers, translating schematics into robust layouts, performing layout versus schematic (LVS) and design rule checks (DRC), and ensuring high-quality physical implementation. The role involves running and interpreting physical verification reports, resolving layout-related issues,
and contributing to layout guidelines and reusable blocks for future designs.
The engineer will also participate in design reviews, documentation, and coordination with cross-functional teams to meet performance, area, and schedule targets.
Qualifications
- Candidates should possess strong skills in Layout Design for analog and mixed-signal integrated circuits, including floorplanning, device matching, routing, and parasitic optimization.
- Candidates should possess solid Circuit Design knowledge, particularly in Analog and Analog Circuits, to understand schematics, performance requirements, and layout impact on circuit behavior.
- Candidates should possess experience in Physical Verification, including LVS, DRC, ERC, and familiarity with industry-standard tools and foundry-specific rule decks.
- Beneficial qualifications include proficiency with EDA tools (e.g., Cadence Virtuoso or similar), understanding of CMOS process technologies, and experience with high-volume or advanced-node designs.
- Beneficial qualifications include a bachelor’s or master’s degree in Electrical Engineering, Electronics, or a related field, strong analytical and problem-solving skills, attention to detail, and the ability to work effectively in cross-functional engineering teams.
📌 Analog Layout Engineer (Bengaluru)
🏢 CoreIC Technologies
📍 Bengaluru