Job Description Location: Bangalore / Hyderabad, India
n Experience: 4–10 Years
n Employment Type: Full time
nRole Summary
nWe are looking for an experienced Analog Layout Engineer to join our semiconductor design team and work on high-performance analog and mixed-signal IPs in advanced CMOS/FinFET technology nodes.
nThe ideal candidate should have robust hands-on experience in full-custom analog layout , preferably with TSMC technology nodes , and a solid understanding of matching, parasitics, advanced layout techniques, and physical verification.
nThe role involves working closely with analog circuit designers, physical verification, and other cross-functional teams to deliver high-quality, silicon-ready layouts.
nKey Responsibilities
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Develop full-custom analog and mixed-signal layouts for complex IC designs.n
Work on layout of analog building blocks such as:n
Op-Ampsn
Bandgap referencesn
LDOs / Regulatorsn
ADC/DAC blocksn
PLL/DLLn
Charge Pumpsn
Current/Voltage Referencesn
High-speed I/O and SerDes/DDR PHY circuitsn




Implement advanced layout techniques including:n
Common-centroidn
Interdigitationn
Symmetryn
Matchingn
Dummy devicesn
Guard ringsn
Shieldingn
Sensitive-node isolationn
Perform parasitic-aware layout optimization and minimize the impact of routing and device parasitics on circuit performance.n
Work closely with analog designers to understand circuit requirements and translate schematics into optimized physical layouts.n
Perform DRC, LVS, ERC and other physical verification checks and debug layout issues.n
Support PEX/post-layout simulation and optimize layouts based on extracted parasitics.n
Ensure layouts meet requirements for area, matching, noise, reliability, EM/IR and performance .n
Work with advanced TSMC technology nodes , including FinFET-based processes.n
Collaborate with circuit design, verification, reliability, and physical design teams throughout the

📌 Analog Layout Engineer Bengaluru
🏢 Leadic Design
📍 Bengaluru