Key Responsibilities
- Work with system and micro-architects to define high-level, implementable specifications
- Develop RTL and run front-end flows such as lint, CDC, low-power checks, Conformal, and DFT checks
- Collaborate with verification teams on test plan development and debugging
- Run synthesis, manage timing constraints, and deliver synthesized netlists to physical design teams
- Write and manage UPF files; perform power-aware equivalence and low-power checks
- Coordinate with DFT, physical design, and emulation teams to meet project goals
- Support post-silicon validation teams in bring-up and debug
Skills: LINT, Synthesis, Sta, Rtl Design
Experience: 8.00-14.00 Years
📌 Senior/Staff/Senior Staff/Principal - RTL Design Engineer (Noida)
🏢 Renesas
📍 Noida