Job DescriptionJob Title: FPGA RTL Design Engineer
nLocation: Bengaluru, India
nExperience: 4+ Years
nRole Overview:
nWe are seeking a skilled FPGA RTL Design Engineer with 4+ years of experience in FPGA development and digital design. The candidate will be responsible for RTL design, implementation, verification, and FPGA bring-up for high-performance SoC/FPGA-based solutions.
nKey Responsibilities:
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- Design and develop RTL using Verilog/SystemVerilog/VHDL for FPGA-based applications.n
- Perform FPGA synthesis, place & route, timing closure, and performance optimization.n
- Develop and execute functional verification plans, testbenches, and debugging activities.n
- Collaborate with hardware, firmware, and system teams for integration and validation.n
- Analyze and resolve design, timing, and FPGA implementation issues.n




- Support board bring-up, lab validation, and customer issue resolution.n

nRequired Skills:
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- 4+ years of experience in FPGA RTL design and verification.n
- Strong proficiency in Verilog/SystemVerilog and digital design fundamentals.n
- Experience with FPGA tools such as Xilinx Vivado, Intel Quartus, or equivalent.n
- Good understanding of timing analysis, CDC, reset synchronization, and FPGA architectures.n
- Experience with simulation and debugging tools (ModelSim, Questa, VCS, etc.).n
- Familiarity with interfaces such as PCIe, Ethernet, DDR, AXI, SPI, I2C, or UART.n
- Robust problem-solving and debugging skills.n

📌 FPGA RTL Design Engineer (Vasanthanagar)
🏢 UST
📍 Vasanthanagar