Key Responsibilities

- Develop and maintain UVM-based verification environments using SystemVerilog.

- Create and execute testbenches, virtual sequences, test scenarios, and functional coverage models.

- Perform PCIe protocol verification across Gen3, Gen4, Gen5, and Gen6.

- Verify PCIe Transaction Layer (TLP), Data Link Layer (DLLP), LTSSM, and protocol state transitions.

- Implement error injection scenarios and identify coverage gaps in verification environments.

- Debug complex RTL, BFM, LTSSM, and TLP failures using Verdi, VCS, and other debugging tools.

- Perform root-cause analysis and support functional and coverage closure.

- Develop Python and Shell scripts to automate verification, testing, and reporting workflows.

- Work closely with design, architecture, and verification teams to resolve issues.

- Contribute to improving verification infrastructure, test quality, and overall product reliability.

Required Skills

- Strong hands-on experience in SystemVerilog and UVM.

- Positive understanding of PCIe Gen3/Gen4/Gen5/Gen6 protocols.

- Experience with PCIe Transaction Layer (TLP), Data Link Layer (DLLP), and LTSSM.





- Knowledge of verification methodologies, testbench development, and functional coverage.

- Experience in error injection, protocol validation, and debugging.

- Proficiency in Verdi, VCS, Linux, and version control tools such as Perforce.

- Good programming and scripting skills in Python and Shell scripting.

- Understanding of OOP concepts and RTL verification.

- Strong problem-solving and analytical skills.

Preferred Skills

- Experience with PCIe BFM development and integration.

- Knowledge of AER, Configuration Space, Equalization, Ordered Sets, and Credit-Based Flow Control.

- Experience in PCIe error reporting and logging infrastructure.

- Familiarity with AXI-Stream, DMA controllers, FSM design, and synthesizable SystemVerilog.

- Experience with PCIe power management features, including L0p sub-state.

- Knowledge of C/C++ programming and transaction-level modeling.

- Experience with semiconductor, VLSI, SoC, or high-speed interconnect verification projects.

📌 PCIe Design Verification Engineer (Bengaluru)
🏢 Lookup IT Solutions
📍 Bengaluru