Hiring: Memory Layout Engineers (Bengaluru)

Hiring: Memory Layout Engineers (Bengaluru)

12 Sep
|
ACL Digital
|
Bengaluru

12 Sep

ACL Digital

Bengaluru

Job DescriptionWe are hiring experienced Memory Layout Engineers (3–18 yrs) with expertise in ARM architectures and advanced nodes (7nm, 5nm, 2nm). The ideal candidate brings a solid foundation in memory compilers, general memory concepts, and hands-on physical design on lower process technologies.

NLocation: Bangalore & Hyderabad

NNotice Period: 0–15 Days (Immediate joiners preferred)

NTo Apply: Send your updated CV to [email protected]

📌 Hiring: Memory Layout Engineers (Bengaluru)
🏢 ACL Digital
📍 Bengaluru

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