Job DescriptionSOC RTL Design Verification

NExperience: 4 to 10 Years

NLocation: Bangalore

NKey Responsibilities:

N

n
- Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification
N
- Development and verification of post-si validation sequences using C/C++
N
- Create methodology-based (UVM) verification testbenches and components from scratch at SOC level along with re-usability of IP level components.
N
- Experienced with Verilog, System Verilog, and C or C++
N
- Positive understanding of JTAG protocol
N
- Contributes to test plan development.
N

nCandidate past experience requirements,

N

n
- Should have experience in system-level Verification.
N




- DDR prior experience isnot mandatory.
N

nAbout Company:

NACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.

Nwww.Acldigital.Com

📌 Rtl Design Verification Engineer (Bengaluru)
🏢 ACL Digital
📍 Bengaluru