Job DescriptionFormal Verification Engineer

NExperience: 4 to 12 Years

NLocation: Bangalore

NJob Description

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- Responsible for developing and executing formal verification strategies for IP and SoC blocks.
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- Write and prove assertions using SystemVerilog Assertions (SVA) or PSL.
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- Use tools like JasperGold, VC Formal, or OneSpin to verify complex designs.
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- Collaborate with designand DV teams to integrate formal early in the cycle.
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- Identify corner-case bugs that are hard to detect via simulation.
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- Perform connectivity, X-check, and equivalence checking using formal apps.
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- Debug failures and analyze root causes efficiently.
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- Drive closure with coverage and waiver management.
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- Automate formal flows using scripting (Python, Perl, or Tcl).
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- Document verification plans, results, and sign-off reports.
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nAbout Company

nACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.

📌 Hiring: Formal Verification Engineer (Bengaluru)
🏢 ACL Digital
📍 Bengaluru