Job DescriptionYour Role:
N-Own feasibility studies for defining the system architecture, requirements, and external interfaces;

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- Developmicroarchitecture and logic design in collaboration with functional leads to deliver design from architecture to tape-out;
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- Perform RTL coding, Lint checks, CDC tests, and creating timing constraint files;
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- Work closelywith Synthesis, STA, PD, and DFT teams to meet all functional requirements, performance, power, and area goals;
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- Develop flows and tools as necessary in support of design activities. N

nYour profile:
NWork location: PAN India
NNP: Max 45days
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- 8+ year experience in VLSI design;
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- BSC/MSC in Electrical/Computer engineering;
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- Robust Verilog/System Verilog or VHDL skills;
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- Experience in defining microarchitecture and design of complex design units;
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- SoC design experience;
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- Proficient in advanced design practices (Lint, CDC, and Low Power Design);
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- Proficient with the various backend tools (synthesis and STA);
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- Familiar with CPU (ARM, RISC-V, or x86) instruction set;
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- Proficiency using Perl/C/Python scripting and programming;
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- Verificationmethodologies understanding;
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- Good communication and interpersonal skills. N

📌 Rtl Design Leads/Architect | 9-12yrs (Bengaluru)
🏢 Capgemini Engineering
📍 Bengaluru