13 Sep
|
Modernize Chip Solutions (MCS)
|
Vasanthanagar
13 Sep
Modernize Chip Solutions (MCS)
Vasanthanagar
Job DescriptionResponsibilities: Nn Strong expertise in low-power and ultra-low-power SoC implementation to lead power-intent validation and integration using UPF methodologies for ADI's advanced node designs. N Ability to collaborate and resolve agile & static IR issues. N Good exposure to high-frequency design convergence for PDN and descent exposure VCD flows, RHVoltus/Voltus, and Vmin flows. N Evaluate and optimise different power distributions (voltage rail assignments, regulator assignment) for a SoC. N Modelling the power delivery networks, including on-die power gating and in-rush current profiles. N Modelling the current profiles and peak current demands of various IPs. N Evaluate and optimise voltage rail assignment and regulator requirements for SOC. N Working with the system, PMIC and silicon package team to model the voltage response of the power delivery network. N
📌 Emir Engineer (Vasanthanagar)
🏢 Modernize Chip Solutions (MCS)
📍 Vasanthanagar