– Analog Layout Engineer /n Position: Analog Layout Engineer /n Experience: 4+ Years /n Location: Bangalore / Hyderabad /n Availability: Immediate to 15 Days /n Technology: Lower-Node / Advanced Process Technologies /n Role Overview /n We are looking for experienced Analog Layout Engineers with strong hands-on expertise in custom/analog layout development for lower-node and advanced semiconductor technologies. The candidate will be responsible for developing high-quality layouts for analog and mixed-signal blocks while ensuring design robustness, performance, and compliance with physical verification requirements. /n Key Responsibilities /n /n
- Develop custom analog and mixed-signal layouts for various semiconductor IPs and blocks.
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- Work on lower-node technologies and advanced process nodes, preferably FinFET or similar technologies.
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- Translate circuit schematics and design requirements into optimized physical layouts.
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- Perform complete layout implementation, optimization, and physical verification.
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- Handle DRC, LVS, ERC and other physical verification activities and resolve violations.
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- Work closely with Analog Design, Circuit Design, Physical Verification and Technology teams to ensure layout quality.
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- Analyze and resolve layout-related design issues and improve layout performance.
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- Optimize layouts for area, matching, parasitics and performance.
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- Perform post-layout verification and debugging.
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- Ensure layouts meet foundry design rules and technology requirements.
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- Support design reviews, tape-out activities and project milestones.
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- Maintain proper documentation and follow established layout methodologies and quality standards.
/n /n Required Skills /n /n
- 4+ years of relevant experience in Analog / Custom Layout Design.
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- Strong hands-on experience with Analog Layout and Physical Design.
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- Experience working on lower-node / advanced semiconductor technologies.
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- Strong knowledge of DRC, LVS, ERC and physical verification.
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- Good understanding of analog layout concepts and matching techniques.
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- Experience with Cadence Virtuoso or equivalent custom layout tools.
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- Positive understanding of CMOS devices, parasitics and layout-dependent effects.
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- Experience in handling complex analog blocks and resolving layout issues.
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- Ability to work independently as well as collaboratively with cross-functional teams.
/n /n Preferred Experience /n Experience with layout of any of the following blocks will be an advantage: /n /n
- PLL / DLL
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- ADC / DAC
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- Bandgap / Reference circuits
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- LDO / Power Management
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- Amplifiers
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- Comparators
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- SerDes / High-speed interfaces
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- Data converters
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- Mixed-signal IPs
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- Memory-related analog circuits
/n /n Candidate Profile /n We are looking for candidates who have strong hands-on Analog Layout experience, particularly in advanced/lower-node technologies, with good exposure to physical verification and tape-out environments. /n Notice Period: Immediate to 15 Days preferred. /n Interested candidates can share their updated CV at:
[email protected]
📌 Analog layout Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru