Who are we and what do we do? /n /n The HVP team in TI develops power solutions for a wide array of end-equipments, with several hundreds of volts of withstand capability. This team in TI offers one of the world's largest comprehensive portfolios of high-performance AC/DC and isolated DC/DC controllers, GaN-integrated power-stages and converters, and modules with the widest range of power topology options. /n /n This is a new investment area for TI in India, and the candidate will get to be part of an exciting startup-like ecosystem, getting the experience of building a team and technical expertise under the safety of the wider TI umbrella. /n /n /n What will you be doing in this role? (Responsibilities) /n /n /n

- Responsible to develop detailed coverage driven Verification plan working closely with System and design team.

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- Behavioral Modelling of analog blocks using SV RNM, verilogAMS (wreal, electrical).

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- Identify and develop system level tests in AMS to ensure bug free silicon.

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- Independently develop SV/UVM based testbenches, tests, checkers, assertions and enhancing with randomization and coverage.

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- Innovate & drive new and improved design verification methodologies as needed, work with the EDA team to upgrade tools and flows.

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- Interacting with Test/Validation in various post silicon activities and customer debug/analysis.

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- Team player: Collaborate and drive smart initiatives within the team. Mentor and lead the junior folks in team

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- Closely working with DMS/DV team to understand the SOC – RTL verification and capable to support in case of project requirement.

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- Good interaction with Digital Design team, Firmware developers, Analog Designers, and rest of the team.

/n /n /n /n What do we expect from you? (Mini Qualifications)



/n /n /n Knowledge and Skills /n /n /n /n

- Solid fundamentals in mixed-signal designs, including a thorough understanding of analog building blocks, digital design processes, and top-level integration.

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- Experienced in developing mixed signal testbench in SV/UVM from scratch with the capability to debug and optimize mixed-signal simulation performance, understanding the necessary trade-offs.

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- Strong simulation debug capability, able to analyze simulation waveforms and pinpoint issues in schematics simulation or models

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- Knowledge on analog controllers to develop system testbench and debug issues.

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- Handling & owning design deliverables and schedule

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- Bachelors / Masters in Electrical / Electronics Engineering

/n /n /n /n Other /n /n /n Good team player, attitude and thirst for continuous learning /n Strong communication and interpersonal skills /n Ability to function independently, be self-driven /n /n /n Preferred Skills/ Experience /n /n /n /n

- 3-10 years of experience in mixed-signal design verification

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- Hands on experience/expertise in working with SOC and developing SOC-AMS testbench.

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- Expertise in developing the simulation/DV plan as per the system definition.

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- Experience with Cadence Mixed-Signal Design Environment tools, including Virtuoso, ADE Assembler, Xcelium, VIVA & Simvision

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- Expertise in Cadence Spectre simulation test bench development, Regression Flow & debug

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- Expertise in mixed-signal waveform review, debugging, and coverage analysis.

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- Excellent with HDL – system Verilog, UVM, verilogAMS

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- Experience in writing checkers, assertions and monitors for top-level simulations.

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- Expertise in automation using Python / Perl / Tcl / shell scripting.

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- Experience as AMS Lead for a project is an addon.

/n /n

📌 AMS-DV Lead | High-Voltage Power (Bengaluru)
🏢 Texas Instruments
📍 Bengaluru